Keynote Address 

1.3.1: Embedded Tutorial, Organizer and Chair: Margarida Jacome, University of Texas at Austin, USA

1.3.2: Applied Verification Techniques, Co-Chairs: Carl Pixley, Motorola, USA and Warren Hunt, IBM Austin Research Laboratory, USA 

1.3.3: Computer Arithmetic, Chair: Kevin Nowka, IBM Austin Research Laboratory, USA 

Lunch Presentation 

  • Evolution of DSP Architecture
    Speaker: Laurence R. (Ray) Simar, Jr., Texas Instruments, USA

1.4.1: Machines and Characterization, Chair: Chris Newburn, Intel, USA 

1.4.2: Power and Noise Considerations in Microprocessor Design, Chair: Priyadarsan Patra, Intel, USA 

1.4.3: Architectures for Embedded Systems, Chair: Tom Truman, Lucent Bell Laboratories, USA 

1.4.4: Built-In Self Test, , Chair: Cheng-Ping Wang, Texas Instruments, USA 

1.5.1: Intelligent Memory, Chair: Doug Burger, The University of Texas at Austin, USA 

1.5.2: Performance and Area Optimization, Chair: Shantanu Ganguly, Intel, USA 

1.5.3: VLSI Implementation of Arithmetic Circuits, Chair: Magdy Abidir, Motorola, USA 

1.5.4: Design Convergence, Chair: Georg Pelz, Gerhard-Mercator University GH, Duisberg, Germany 

Poster Presentations 

    1.7: Panel Discussion 

  • Iteration-Free Timing Closure
    Organizers: Sandip Kundu, Intel, USA; Tom Dillinger, Sun Microelectronics, USA
    Moderator: Al Davis, University of Utah, USA
     Panelists: Jacques Benkoski, Joe Hutt, Michael Jackson, Sanjiv Kaul, Paul McClellan, Kevin Walsh

   2.1: Plenary

  • MicroProcessor Architecture; Trends and Directions
    Uri Weiser, Intel, USA

2.2.1: System Level Issues, Chair: Margarida Jacome, The University of Texas at Austin, USA 

2.2.2: Compilers and Algorithms, Chair: Steve Keckler, The University of Texas at Austin, USA 

2.2.3: Test Generation and Delay Testing, Chair: Karim Arabi, Ecole de Technologie Superieure (ETS), Canada 

2.3.1: Microarchitecture, Chair: Andrew Pleszkun, University of Colorado, USA 

2.3.2: Efficient State-Space Exploration, Chair: Anna Slobodova, Compaq, USA 

2.3.3: Clocking and Analog Circuit Prototyping, Chair: Rajesh Galivanche, Intel, USA 

2.3.4: Embedded Tutorial, Organizer and Chair: Andreas Both, Motorola Semiconductor Products Sector, USA 

2.4.1: Digital Signal Processors, Organizer and Chair: Ken Shepard, Columbia University, USA

2.4.2: Caching Approaches, Chair: Mauricio Breternitz, Motorola, USA 

2.4.3: CMOS Circuit Design Techniques, Chair: Sharad Mehrotra, IBM, USA 

   3.1: Plenary 

 3.2.1 Invited Session

The TriMedia CPU64 VLIW Media Processor
Organizers: Kees Vissers, Philips Research Labs. The Netherlands; Mauricio Breternitz, Motorola, USA
Chair: Kees Vissers, Philips Research Labs, The Netherlands

3.2.2: Logic Synthesis, Chair: Ken Shepard, Columbia University, USA 

3.2.3: Hardware Software Partitioning and Synthesis, Chair: Miodrag Potkonjak, University of California at Los Angeles, USA 

 

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