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Monday, October 2, 2006 |
|
08.30 |
Coffee |
|
09.00 |
Welcome - Pranav
Ashar, Real Intent, Inc. |
|
09.15 |
Keynote - Bill Dally,
Stanford University
Computer Architecture in the Many-Core Era |
|
10.15 |
Break |
|
10.30 |
Session 1.1
Microarchitecture Optimization
Chair:
Tejas Karkhanis,
AMD
|
Session 1.2
Timing
Analysis
Chair:
Florentin
Dartu, Synopsys
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Session 1.3
Advanced
Circuits and Interconnections
Chair: Srinivas Raghvendra, Synopsys
|
|
12.30 |
Lunch |
|
01.30 |
Session
2
Special Session on Nanotechnology - ( I )
Krishnendu Chakrabarty
Automated Design of Microfluidics-Based
Biochips
Connecting Biochemistry to Electronics CAD |
|
02.30 |
Break |
|
03.00 |
Session 3.1
Technology-Aware Design
Chair:
Suleyman Sair,
North Carolina State University |
Session 3.2
Multiprocessors and Systems-on-Chip
Chair:
Huiyang
Zhou, University of Central Florida
|
Session 3.3
Robust
and Low-Power Design Styles
Chair: Larry Clark,
Arizona State University
|
|
05.00 |
Break |
|
06.00 |
Banquet
Keynote - Fabio Angelillis, VP, Synopsys
Scaling Manufacturability Software to Thousands of Processors |
| |
|
Tuesday,
October 3, 200 |
|
08.30 |
Session 4
Special Session on Interconnect
Enno Wein, Arteris
Uri Cummings, Fulcrum Microsystems
Drew Wingard, Sonics Incorporated |
|
10.00 |
Break |
|
10.30 |
Session 5.1
Hardware and Software Scheduling Techniques
Chair:
Jiangjiang Liu,
Lamar University
|
Session 5.2
Nanoscale Modeling + Synthesis
Chair:
Azita
Emami,
Columbia University
|
Session 5.3
Power
Issues in Test
Chair: Rob Aitken,
ARM
|
|
12.00 |
Lunch Panel
"Extending the Reach of Formal Verification for Electronic Design"
Real Intent, Synopsys, Mentor Graphics, and nVidia |
|
01.30 |
Session 6
Special Session on Hardware Equivalence
Jason
Baumgartner, IBM
Daher Kaiss, Intel
Alan Hu,
University of British Columbia
|
|
03.00 |
Break |
|
03.30 |
Session 7.1
Functional Verification --Advances and Applications
Chair: Jason Baumgartner, IBM
|
Session 7.2
Application Specific Processing Elements
Chair:
Jamil
Kawa
Synopsys
|
Session 7.3
Physical Design
Chair: Saurabh Adya, Synplicity
|
|
05.00 |
Break |
|
05.30 |
Session 8.1
Design
Techniques and Methods
Chair:
Mauricio
Breternitz Jr.,
Intel
|
Session 8.2
System On Chip Design
Chair:
Roozbeh
Jafari,
University of California, Berkeley
|
Session 8.3
Power-Efficient Systems
Chair:
Dan Sorin,
Duke University
|
|
07.00 |
End of Session |
| |
|
Wednesday,
October 4, 2006 |
|
08.30 |
Session 9.1
Improving Test Quality
Chair: Yervant Zorian,
Virage Logic Corporation
|
Session 9.2
Architectural Synthesis
Chair: Anup Hosangadi,
Cadence
|
|
|
10.00 |
Break |
|
10.30 |
Session 10.1
Design
Practice
Chair:
Steve Keckler,
University of Texas, Austin
|
Session 10.2
Architectural Support for Error Protection
Chair: Eric Rotenberg,
North Carolina State Univ
|
|
|
12.00 |
Lunch
Special Session on Nanotechnology - ( II )
R. Iris Bahar, Brown University
Trends and Future Directions in Nano Structure Based
Computing and Fabrication |
